Technical Field
Embodiments described here are related to computing systems, and more particularly, to the transmission of transactions between functional blocks within computing systems.
Description of the Related Art
Computing systems may include one or more systems-on-a-chip (SoC), which may integrate a number of different functions, such as, graphics processing, or multiple processing cores, onto a single integrated circuit. With numerous functions included in a single integrated circuit, improved computational performance and reduced power consumption may result.
To implement the desired functions on an SoC, one or more processors may be employed. Each processor may include a memory system with multiple levels of caches for providing low latency access to program instructions and operands. With multiple processors accessing multiple caches as well as main memory, the issue of cache coherency may arise. For example, a given data producer, such as, e.g., one of the processors, may write a copy of data in a cache, but the update to main memory's copy of the data may be delayed. In write-through caches, a write operation may be dispatched to memory in response to the write to the cache line, but the write is delayed in time. In a writeback cache, writes are made in the cache and not reflected in memory until the updated cache block is replaced in the cache (and is written back to main memory in response to the replacement).
In some computing systems, cache memories may be shared allowing multiple processors or processor cores to access a single cache memory. Requests to read data from or store data to a cache memory can result in significant communication traffic on a network between the various processors and their associated memories. Such traffic may result in congestion at points within the network which may limit computational performance while processors wait for responses to their respective requests.